Manufacturing method of liquid crystal display device
专利摘要:
A plurality of gate bus lines and a plurality of data bus lines arranged in a matrix form on the same glass substrate according to the present invention; A plurality of thin film transistors formed at intersections of the gate bus line and the data bus line; and a pixel electrode and a common electrode provided in a space surrounded by each gate bus line and the data bus line to form a parallel field when a signal is applied; A method of manufacturing a liquid crystal display device, comprising: depositing a transparent electrode material and a metal material having a low specific resistance on a glass substrate; Etching the metal material through a photolithography process to form an upper gate bus line made of the metal material; and etching the transparent electrode material through a photolithography process, the common electrode made of the transparent material; And forming a lower gate bus line made of the transparent electrode material under the shape of the upper gate bus line to complete the two gate gate lines. 公开号:KR19990056730A 申请号:KR1019970076741 申请日:1997-12-29 公开日:1999-07-15 发明作者:이근수;정기범;고병권 申请人:김영환;현대전자산업 주식회사; IPC主号:
专利说明:
Manufacturing method of liquid crystal display element The present invention relates to a method for manufacturing a liquid crystal display device, and more particularly, to a method for manufacturing a liquid crystal display device for improving the aperture ratio of an in-plane switching mode liquid crystal display device. Generally, the liquid crystal display device which comprises display elements, such as a television and a graphic display, consists essentially of a pair of transparent glass substrate and the liquid crystal enclosed between this glass substrate. Such liquid crystal display devices have undergone many advances and are being developed for application in various display fields. However, due to the narrow viewing angle due to the birefringence phenomenon, there is a limitation in developing a high quality liquid crystal display device. In order to improve this viewing angle, an optical compensation film is used or a vertically-aligned mode or an in-plane switching mode (hereinafter referred to as "IPS mode") is used. The IPS mode improves the viewing angle by implementing the pixel electrode and the common electrode on the same substrate on the glass substrate on which the active element is formed, and by forming a parallel field between the pixel electrode and the common electrode when driving the liquid crystal display. 1 shows a perspective view of a conventional IPS mode liquid crystal display device. 1 illustrates a single cell constituting an active matrix liquid crystal display device. The gate bus line 110, which is an address electrode, on the same surface of the lower glass substrate, and parallel lines spaced in parallel with the gate bus line 110 by a predetermined distance, and a plurality of lines are integrally formed with the parallel lines as a single unit. The protruding common electrode 120 is disposed. The gate electrode and the gate bus line 110 are integrally formed, and an insulating film (not shown), which is a gate dielectric film of the semiconductor device, and an amorphous silicon layer 130, which is a channel layer of the semiconductor device, are disposed on the gate bus line. The data bus line 140 is disposed to intersect the gate bus line 110, and is integral with the data bus line 140 so as to be parallel to the gate bus line 110 and overlap one side with a predetermined portion of the amorphous silicon layer. The source electrode 140a protrudes by a predetermined length. The drain electrode 150a is formed to overlap the other side of the amorphous silicon layer 130 by a predetermined portion to form the thin film transistor T. The pixel electrode 150 has a rake shape and is configured to intersect with each other between the protruding lines of the common electrode 120 and is in contact with the drain electrode 150a. Subsequently, the upper glass substrate on which a color filter or the like is formed is bonded to each other, and a polarizing plate is attached to the back surface of both substrates, and then a liquid crystal is encapsulated to manufacture a liquid crystal display element. The voltage is applied to the signal line of the liquid crystal display element to generate a parallel field between the pixel electrode and the common electrode, thereby improving the viewing angle. Here, the gate bus line and the common electrode in the IPS mode are formed of molybdenum or chromium, and the data bus line and the pixel electrode are formed of aluminum. As mentioned above, the conventional IPS mode improves the viewing angle, but has a problem that the aperture ratio is lowered due to the opaque electrode material. Therefore, to solve this problem, the common electrode and the pixel electrode are formed of ITO, which is a transparent material. However, ITO cannot be used alone as a gate electrode material because of its large resistance and long signal delay time. Therefore, it must be used together with molybdenum or chromium. However, when ITO is deposited first to form a common electrode, and then molybdenum or chromium is deposited and a gate bus line is formed, an alignment key formed of ITO is transparent and difficult to recognize in the next process step. In addition, when the gate bus line is formed by depositing molybdenum or chromium and then ITO is deposited and the common electrode is formed, there is a problem that molybdenum or chromium is damaged in the etching liquid of ITO during ITO etching. Accordingly, the present invention provides a liquid crystal display capable of compensating the signal delay time of a signal line due to the transparent electrode material while simultaneously configuring the common electrode and the pixel electrode to realize a high aperture ratio IPS mode liquid crystal display device. It is an object of the present invention to provide a method for manufacturing a device. 1 is a perspective view showing a lower substrate of a conventional IPS mode liquid crystal display device. 2 is a perspective view showing a lower substrate of an IPS mode liquid crystal display device according to the present invention; (Explanation of symbols for the main parts of the drawing) 110 and 210: gate bus lines 120 and 220: common electrode 130, 230: amorphous silicon layer 140, 240: data bus line 150, 250: pixel electrode 210a: molybdenum tungsten 220a: ITO 240a: aluminum In order to achieve the above object, a plurality of gate bus lines and a plurality of data bus lines arranged in a matrix form on the same glass substrate according to the present invention; A plurality of thin film transistors formed at intersections of the gate bus line and the data bus line; and a pixel electrode and a common electrode provided in a space surrounded by each gate bus line and the data bus line to form a parallel field when a signal is applied; A method of manufacturing a liquid crystal display device, comprising: depositing a transparent electrode material and a metal material having a low specific resistance on a glass substrate; Etching the metal material through a photolithography process to form an upper gate bus line made of the metal material; and etching the transparent electrode material through a photolithography process, the common electrode made of the transparent material; And forming a lower gate bus line made of the transparent electrode material under the shape of the upper gate bus line to complete the two gate gate lines. (Example) Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. 2 is a perspective view of an IPS mode liquid crystal display device according to the present invention. 2 illustrates a single cell constituting an active matrix liquid crystal display device. The gate bus line 210, which is an address electrode, on the same surface on the lower glass substrate, parallel lines spaced in parallel with the gate bus line 210 by a predetermined distance, and a plurality of lines integrally with the parallel lines are predetermined toward the gate bus line. The common electrode 220 protruding in length is disposed. The common electrode 220 is composed of a transparent indium tin oxide (ITO) 220a, and the gate bus line 210 has a structure in which molybdenum 210a is stacked on the ITO 220a. The molybdenum may be replaced with chromium or the like. The gate electrode and the gate bus line 210 are integrally formed, and an insulating film (not shown), which is a gate dielectric film of the semiconductor device, and an amorphous silicon layer 230, which is a channel layer of the semiconductor device, are disposed on the gate electrode. The data bus line 240 and the pixel electrode 250 are formed on the resultant material. The data bus line 240 is disposed to intersect with the gate bus line 210, integrally with the data bus line 240, parallel to the gate bus line 210, and overlapping with the predetermined partial amorphous silicon layer 230 on one side. The source electrode protrudes by a predetermined length as much as possible. The drain electrode is formed to overlap the other side of the amorphous silicon layer 230 by a predetermined portion to form the thin film transistor T. The pixel electrode 250 is configured in a rake shape so as to intersect with each other between the protruding lines of the common electrode 220 and contacts the drain electrode. The pixel electrode 250 is composed of a transparent ITO 220a, and the data bus line 240 is formed of a structure in which aluminum 240a is stacked on the ITO 220a. Such a transparent electrode improves the aperture ratio by increasing the light transmission area of the pixel. However, when the gate bus line and the data bus line are formed of ITO in consideration of only the aperture ratio, the signal delay time RC delay is longer due to the resistance of the ITO. Therefore, the pixel region through which light transmits is constituted by ITO wiring, and signal lines not related to the aperture ratio are cladding metal having a low specific resistance to prevent the signal delay time from lengthening. In order to manufacture such a liquid crystal display device, ITO and molybdenum tungsten are first deposited on a glass substrate. Then, an upper gate bus line pattern made of molybdenum 210a is formed through a photolithography process. Subsequently, by etching the lower ITO through another photolithography process, the lower gate bus line having the ITO 220a at the bottom along the shape of the common electrode 220 having the ITO 220a and the upper gate bus line pattern. A pattern is formed to complete the gate bus line 210. As such, by forming the pattern with molybdenum tungsten, which is an opaque metal, the alignment key, which is a coordinate reference of the process, can be visually formed. Then, a nitride film (not shown) is deposited on the entire structure, and an amorphous silicon layer 230 serving as a channel layer of the thin film transistor is formed. Next, similarly to the process of forming the gate bus line and the common electrode, ITO and aluminum are sequentially deposited on the resultant, and then a data bus line 240 made of aluminum 240a and ITO 220a through a photolithography process. ) And a pixel electrode 250 made of ITO 220a. As described above, in the IPS mode liquid crystal display device, the signal line in the region where light is transmitted is made of ITO, which is a transparent electrode material, and the signal lines around it are made of ITO and a metal material having a low specific resistance, thereby shortening the signal delay time. And the aperture ratio can be improved. The present invention described above is not limited to the above-described embodiments and the accompanying drawings, and various substitutions, modifications, and changes can be made without departing from the technical spirit of the present invention. It will be evident to those who have knowledge of.
权利要求:
Claims (4) [1" claim-type="Currently amended] A plurality of gate bus lines and a plurality of data bus lines arranged in a matrix on the same glass substrate; A plurality of thin film transistors formed at intersections of the gate bus line and the data bus line; and a pixel electrode and a common electrode provided in a space surrounded by each gate bus line and the data bus line to form a parallel field when a signal is applied; As a manufacturing method of the liquid crystal display element to Depositing a transparent electrode material and a low resistivity metal material on the glass substrate; Etching the metal material through a photolithography process to form an upper gate bus line made of the metal material; and By etching the transparent electrode material through a photolithography process, a lower layer gate bus line made of the transparent electrode material is formed below the common electrode made of the transparent material and the upper gate bus line. Comprising the step of completing the gate bus line. [2" claim-type="Currently amended] The method of claim 1, wherein the metal material is molybdenum or chromium. [3" claim-type="Currently amended] The method of claim 1, wherein the transparent electrode material is ITO. [4" claim-type="Currently amended] The method of claim 1, wherein the data bus line and the pixel electrode are formed on the same surface, and a manufacturing method thereof is the same as the manufacturing method of the gate bus line and the common electrode. It is aluminum, The manufacturing method of the liquid crystal display element characterized by the above-mentioned.
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同族专利:
公开号 | 公开日 KR100462381B1|2005-06-07|
引用文献:
公开号 | 申请日 | 公开日 | 申请人 | 专利标题
法律状态:
1997-12-29|Application filed by 김영환, 현대전자산업 주식회사 1997-12-29|Priority to KR1019970076741A 1999-07-15|Publication of KR19990056730A 2005-06-07|Application granted 2005-06-07|Publication of KR100462381B1
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申请号 | 申请日 | 专利标题 KR1019970076741A|KR100462381B1|1997-12-29|1997-12-29|Manufacturing method of liquid crystal display device| 相关专利
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